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Determining this empirically is going to be at least NP-hard if done truly generally. Yes if it was a simple naïve implementation you might be able to find something without sophisticated models. But ideally, you would have to disassemble the hardware, dump flash ROMs, or even use fabrication lab type equipment to splice and photograph and reconstruct the digital circuits inside chips. Perhaps if you give the number of clock cycles it takes to compute, the maximum number of and/or gates could be estimated which would limit computation complexity, though the size of the chip and memory also would need to be known as time-space tradeoff must be considered. But if complex enough such as using any of the standard crypto algorithms, or worse a large hardware table, then at best you will be stabbing in the dark.
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